3D Video

  1. Depth estimation
    • Y. C. Tseng, P. H. Hsu, and T. S. Chang, "A 124 Mpixels/s VLSI Design for Histogram-Based Joint Bilateral Filtering," Image Processing, IEEE Transactions on, vol. 20, pp. 3231-3241, Nov. 2011.
    • Y. Tseng and T. Chang, "Architecture Design of Belief Propagation for Real-Time Disparity Estimation," IEEE Transactions on Circuits and Systems for Video Technology, vol. 20, pp. 1555-1564, Nov. 2010.
    • N. Y. C. Chang, et al., "Algorithm and Architecture of Disparity Estimation With Mini-Census Adaptive Support Weight," IEEE Transactions on Circuits and Systems for Video Technology, vol. 20, pp. 792-805, June 2010.
    • Y.-C. Tseng, et al., "Fast stereo matching with predictive search range," in Picture Coding Symposium (PCS), 2010, 2010, pp. 506-509.
    • P.-H. Hsu, et al., "Low Memory Cost Bilateral Filtering Using Stripe-Based Sliding Integral Histogram," in 2010 IEEE International Symposium on Circuits and Systems, 2010, pp. 3120-3123.
    • Y.-C. Tseng , et al., "Low-Memory Cost Belief Propagation Architecture for Disparity Estimation," in 2009 IEEE International Symposium on Circuits and Systems, 2009.
    • T.-H. Tsai, et al., "Data reuse analysis of local stereo matching," in ISCAS 2008. 2008 IEEE International Symposium on Circuits and Systems, 2008, pp. 812-15.
    • N. Chang, et al., "Real-Time DSP Implementation on Local Stereo Matching," in 2007 IEEE International Conference on Multimedia and Expo, , 2007, pp. 2090-2093.
    • Y.-C. Tseng, et al., "Low Memory Cost Block-Based Belief Propagation for Stereo Correspondence," in Multimedia and Expo, 2007 IEEE International Conference on, 2007, pp. 1415-1418.
    • T.-H. Tsai, et al., "Census Diffusion with Segment Contraint for Disparity Estimation in Stereo Vision," in VLSI/CAD, 2007.
    • T.-H. Tsai, et al., "Hierarchical Decision Table for Bad Pixel Detection in Stereo Vision," in CVGIP, 2007.
    • Y.-C. Chang and T. S. Chang, "A Scalable Graph-cut Engine Architecture for Real-time Vision," in VLSI/CAD, 2007.
  2. View synthesis
    • Y.-R. Horng, Y.-C. Tseng, and T.-S. Chang, "VLSI Architecture for Real-Time HD1080p View Synthesis Engine," IEEE Transactions on Circuits and Systems for Video Technology, vol. 21, pp. 1329-1340, Sep. 2011.
    • (This is probably the first reported VLSI chip for real time HD1080p view synthesis engine. This one basically follows the flow of MPEG VSRS, but with our unique column processing flow to solve quite a few artifact problems.)
    • Y.-R. Horng, et al., "Stereoscopic Images Generation with Directional Gaussian Filter," in 2010 IEEE International Symposium on Circuits and Systems, 2010.
    • (
    • L.-Y. Ku, et al., "A LOW-COST REAL-TIME COMMAND CONTROL SYSTEM BASED ON STEREO-VISION AND HAND MOTION," in CVGIP, 2008.
    • (This gesture control system is quite simple, just with two web CAMs, but effective which was earlier than the Microsoft Kinect. )
  3. FPGA implementation
    • These works are cooperation results with IMEC, when I was a research visitor in IMEC at 2010. We fully utilize the FPGA resources to achieve HD stereo matching.
    • L. Zhang, et al., "Low-Complexity Stereo Matching and Viewpoint Interpolation in Consumer Applications " in Depth Map and 3D Imaging Applications: Algorithms and Technologies, A. S. Malik, et al., Eds., ed: IGI Global, 2012.
    • L. Zhang, et al., "Real-time high-definition stereo matching on FPGA," in ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2011, pp. 55-64.