SoC Design Laboratory

at Konkuk University (건국대학교)

Welcome to System-on-a-Chip Design Laboratory

We are a research group at the Department of Electronics Engineering, Konkuk University, South Korea. Our research interests include simulating and optimizing SoC accelerators for diverse computation-intensive signal processing algorithms where both algorithmic and architectural design space exploration is crucial to the performance and complexity (e.g., digital modems for WiFi and 6G cellular networks). We are currently developing a push-button style agile SoC design methodology using SystemC-TLM (Transaction-Level Modeling) based virtual platform simulators (e.g., Synopsys's Platform Architect), which helps engineers to focus on algorithm-architecture co-design rather than tedious design steps (e.g., RTL design/verification). The purpose of our in-house accelerator simulator, AccTLMSim, includes (1) optimizing hardware-software partitioning and on-chip memory-network design and (2) leveraging the efficacy of the state-of-the-art EDA tools (e.g., Mentor's Catapult HLS and Synopsys ASIP Designer).

Contact Info.

New Engineering College Bldg. #1116 (11th floor)

Electronics Engineering, Konkuk University

120 Neungdong-ro, Gwangjin-gu, Seoul 05029, Republic of Korea

SoC Design Laboratory, Konkuk University

Copyright (c) SoC Design Laboratory 2014. All rights reserved.